instruction prefetch


instruction prefetch

(architecture)A technique which attempts to minimise the timea processor spends waiting for instructions to be fetchedfrom memory. Instructions following the one currently beingexecuted are loaded into a prefetch queue when the processor'sexternal bus is otherwise idle. If the processor executes abranch instruction or receives an interrupt then the queuemust be flushed and reloaded from the new address.

Instruction prefetch is often combined with pipelining inan attempt to keep the pipeline busy.

By 1995 most processors used prefetching, e.g. Motorola 680x0, Intel 80x86.