释义 |
JK flip-flop JK flip-flop (hardware)An edge triggered SR flip-flop with extra logicsuch that only one of the R and S inputs is enabled at anytime. This prevents a race condition which can occur whenboth inputs of an RS flip-flop are active at the same time.In a JK flip-flop the R and S inputs are renamed J and K. Theset input (J) is only enabled when the flip-flop is reset andK when it is set.
If both J and K inputs are held active then the outputs willchange ("togle") on each falling edge of the clock. JKflip-flops can be used to build a binary counter with areset input.
http://play-hookey.com/digital/logic7.html.
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