segmented address space
segmented address space
(architecture)The effect is to segment memory into blocks, which may overlapeither partially or completely, depending on the contents ofthe segment registers but normally they would be distinct togive access to the maximum total range of addresses. In thiscase the scheme does provide some degree of memory protection within a single process since, for example, a datareference cannot affect an area of memory containing code.However, compilers must either generate slower code or codewith artificial limits on the size of data structures.
The best known implementation is that used on the Intel 8086and later Intel microprocessors, where a 16-bit offset isadded to a 16-bit base address held in one of four segmentbase registers. Each instruction has a default segment (code(CS), data (DS), stack (SS), ? (ES)) which determines whichsegment register is used. Special prefix instructions allowthis default to be overridden.
Other computers, such as GE-645/Honeywell Multics,Burroughs large systems (B-5500, B-6600), and others,have used segmentation to good effect.
Opposite: flat address space. See also addressing mode.