Universal Asynchronous Receiver/Transmitter
Universal Asynchronous Receiver/Transmitter
(communications, hardware)The parallel side of a UART is usually connected to the busof a computer. When the computer writes a byte to the UART'stransmit data register (TDR), the UART will start to transmitit on the serial line. The UART's status register contains aflag bit which the computer can read to see if the UART isready to transmit another byte. Another status register bitsays whether the UART has received a byte from the serial line, in which case the computer should read it from thereceive data register (RDR). If another byte is receivedbefore the previous one is read, the UART will signal an"overrun" error via another status bit.
The UART may be set up to interrupt the computer when datais received or when ready to transmit more data.
The UART's serial connections usually go via separate line driver and line receiver integrated circuits whichprovide the power and voltages required to drive the serialline and give some protection against noise on the line.
Data on the serial line is formatted by the UART accordingto the setting of the UART's control register. This may alsodetermine the transmit and receive baud rates if the UARTcontains its own clock circuits or "baud rate generators".If incorrectly formated data is received the UART may signal a"framing error" or "parity error".
Often the clock will run at 16 times the baud rate (bits persecond) to allow the receiver to do centre sampling - i.e. toread each bit in the middle of its allotted time period. Thismakes the UART more tolerant to variations in the clock rate("jitter") of the incoming data.
An example of a late 1980s UART was the Intel 8450. In the1990s, newer UARTs were developed with on-chip buffers.This allowed higher transmission speed without data loss andwithout requiring such frequent attention from the computer.For example, the Intel 16550 has a 16 byte FIFO.Variants include the 16C550, 16C650, 16C750, and16C850.
The term "Serial Communications Interface" (SCI) was firstused at Motorola around 1975 to refer to their start-stopasyncronous serial interface device, which others were callinga UART.
See also bit bang.
Universal Asynchronous Receiver/Transmitter
Universal Asynchronous Receiver/Transmitter
(communications, hardware)The parallel side of a UART is usually connected to the busof a computer. When the computer writes a byte to the UART'stransmit data register (TDR), the UART will start to transmitit on the serial line. The UART's status register contains aflag bit which the computer can read to see if the UART isready to transmit another byte. Another status register bitsays whether the UART has received a byte from the serial line, in which case the computer should read it from thereceive data register (RDR). If another byte is receivedbefore the previous one is read, the UART will signal an"overrun" error via another status bit.
The UART may be set up to interrupt the computer when datais received or when ready to transmit more data.
The UART's serial connections usually go via separate line driver and line receiver integrated circuits whichprovide the power and voltages required to drive the serialline and give some protection against noise on the line.
Data on the serial line is formatted by the UART accordingto the setting of the UART's control register. This may alsodetermine the transmit and receive baud rates if the UARTcontains its own clock circuits or "baud rate generators".If incorrectly formated data is received the UART may signal a"framing error" or "parity error".
Often the clock will run at 16 times the baud rate (bits persecond) to allow the receiver to do centre sampling - i.e. toread each bit in the middle of its allotted time period. Thismakes the UART more tolerant to variations in the clock rate("jitter") of the incoming data.
An example of a late 1980s UART was the Intel 8450. In the1990s, newer UARTs were developed with on-chip buffers.This allowed higher transmission speed without data loss andwithout requiring such frequent attention from the computer.For example, the Intel 16550 has a 16 byte FIFO.Variants include the 16C550, 16C650, 16C750, and16C850.
The term "Serial Communications Interface" (SCI) was firstused at Motorola around 1975 to refer to their start-stopasyncronous serial interface device, which others were callinga UART.
See also bit bang.